Accel IT Academy offers a free workshop on VLSI design and verification. This is a great opportunity for the engineering students to learn the VLSI technology and become chip designers in the semiconductor industries. This workshop helps you to meet the Industry Experts and interact with them personally. They will share their experience with you and also guide you to learn the technology.

Agenda

VLSI Design and Verification Duration: 1.5 Hours

VLSI Introduction
ASIC and FPGA design flows
Verilog HDL
Implementing RTL using Verilog
Verilog Vs VHDL
Writing testbenches
Code and functional coverage
Introduction to chip verification

How to face the technical Interview? Duration: 30 Minutes

Case Study Duration: 1 hour

Discuss on design specification
Design architecture
Compile the RTL and Testbench
Run the simulation and verify the design

Venue :
Accel IT Academy
#310,Queens Amber Building,
I Cross,Omkara Nagar,
Arekere Mico Layout Main Road,
Bannerghatta Road,
Bangalore - 560076

Date and Time:
Date : 19/04/2009
Time : 10.00 AM

I look forward to welcome you to the Free workshop on VLSI Design and Verification.

To register for this free workshop,Please send your confirmation with your contact details to tech_support(at)vlsitraining(dot)com on or before 17/04/09

--
Regards
Application Engineer,
Accel IT Academy,Bangalore
Tel : +91 9449905839 / 080 41305692